关键词: 流处理器, 指令集验证, System Verilog, 现场可编程门阵列（FPGA）原型验证

Abstract: The improvement of chip design complexity urgently needs advanced methodology to cope with the huge workload of verification. This paper presents a method for functional verification of the “Longtium Stream” processor instruction set by constructing an automatic coverage-driven verification platform. The experimental results show that the method improves the efficiency and functional coverage of verification and enhances the reusability and portability of the verification platform. This paper builds a FPGA prototype system to evaluate the functionality and performance of the Stream processor, and proposes optimization methods for accelerating its performance.

Key words: Stream processor, instruction set verification, System Verilog, Field Programmable Gate Array（FPGA） prototype verification