计算机工程与应用 ›› 2007, Vol. 43 ›› Issue (19): 111-114.
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陈 杰1,2，章 军1
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CHEN Jie1,2，ZHANG Jun1
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摘要： 提出了一种集成“龙芯1号”RISC CPU以及其它12种IP核的SoC的体系结构，并对其性能进行了分析。此外，还将该SoC与目前市场上存在的同类SoC的主要特征进行了对比，该SoC的设计目标定位在低成本、低功耗、高稳定性与安全性的32位嵌入式应用。
Abstract: The architecture of a SoC integrated GODSON-1 RISC CPU with other twelve IP cores is presented and its performance is analyzed in this paper.In addition，the main features of this SoC are compared with those of the same type chips in the market.In summary，the design goal of this SoC is aiming at 32-bit embedded applications which are concerned with low cost，low power consumption，high stability and security.
陈 杰1,2，章 军1. 一种集成“龙芯1号”IP核的SoC的体系结构[J]. 计算机工程与应用, 2007, 43(19): 111-114.
CHEN Jie1,2，ZHANG Jun1. Architecture of SoC integrated with GODSON-1 IP core[J]. Computer Engineering and Applications, 2007, 43(19): 111-114.
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http://cea.ceaj.org/CN/Y2007/V43/I19/111
