复用NoC测试SoC内嵌IP芯核的测试规划研究

doi:10.3778/j.issn.1002-8331.2010.15.019

计算机工程与应用 ›› 2010, Vol. 46 ›› Issue (15): 60-63.DOI: 10.3778/j.issn.1002-8331.2010.15.019

复用NoC测试SoC内嵌IP芯核的测试规划研究

赵建武，师奕兵，王志刚

电子科技大学自动化工程学院，成都 610054

收稿日期:2009-03-17 修回日期:2009-05-14 出版日期:2010-05-21 发布日期:2010-05-21
通讯作者: 赵建武

Research on test scheduling for SoC embedded IP cores based on reuse of network-on-chip

ZHAO Jian-wu，SHI Yi-bing，WANG Zhi-gang

School of Automation Engineering，University of Electronic Science and Technology of China，Chengdu 610054，China

Received:2009-03-17 Revised:2009-05-14 Online:2010-05-21 Published:2010-05-21
Contact: ZHAO Jian-wu

摘要/Abstract

摘要： 测试规划是SoC芯片测试中需要解决的一个重要问题。一种复用片上网络测试内嵌IP芯核的测试规划方法被用于限制测试模式下SoC芯片功耗不超出最大芯片功耗范围，消除测试资源共享所引起的冲突，达到减小测试时间的目的。提出了支持测试规划的无拥塞路由算法和测试扫描链优化配置方法。使用VHDL硬件描述语言实现了在FPGA芯片中可综合的二维Mesh片上网络测试平台，用于片上网络性能参数、路由算法以及基于片上网络的SoC芯片测试方法的分析评估。

关键词: 片上网络, 微系统芯片, 内嵌IP芯核, 测试规划

Abstract: One of the main problems for the test of an SoC is the test scheduling.In the paper，a test scheduling method of NoC-based SoC is used to minimize test time while addressing resource conflicts between shared test resources and power dissipation constraints.Both the routing algorithm and the test access chains optimal algorithm are developed to support the test scheduling.A 2D mesh topological NoC is described by using VHDL while being implemented in FPGA.The NoC test platform is developed to analyze the NoC performance parameters，routing algorithm and switching algorithm.Finally，The experimental results from NoC test platform are analyzed.

Key words: network-on-chips, System-on-Chip, embedded IP cores, test scheduling

中图分类号:

TN407

赵建武，师奕兵，王志刚. 复用NoC测试SoC内嵌IP芯核的测试规划研究 [J]. 计算机工程与应用, 2010, 46(15): 60-63.

ZHAO Jian-wu，SHI Yi-bing，WANG Zhi-gang. Research on test scheduling for SoC embedded IP cores based on reuse of network-on-chip[J]. Computer Engineering and Applications, 2010, 46(15): 60-63.

[1]	林华洲，张大坤，黄翠. 基于改进遗传算法的3DNoC低功耗映射研究[J]. 计算机工程与应用, 2016, 52(1): 76-80.
[2]	许川佩，陈征南，任智新. 基于云自适应遗传算法的NoC映射研究[J]. 计算机工程与应用, 2012, 48(36): 70-74.
[3]	车晶，张瑛. 基于自适应模拟退火的NoC映射算法[J]. 计算机工程与应用, 2012, 48(23): 58-62.
[4]	许川佩，董平，关鉴. 改进量子算法的片上网络映射研究[J]. 计算机工程与应用, 2011, 47(1): 70-73.
[5]	杨智峰¹，田泽². 用NS2评估片上网络体系结构的性能[J]. 计算机工程与应用, 2010, 46(18): 74-76.
[6]	刘家俊¹,顾华玺²,王长山¹. mesh优先级容错路由[J]. 计算机工程与应用, 2009, 45(4): 105-107.
[7]	袁涛樊晓桠荆元利. 面向并行DSP应用的双路由多层Mesh结构研究[J]. 计算机工程与应用, 2007, 43(6期): 88-91.

复用NoC测试SoC内嵌IP芯核的测试规划研究

Research on test scheduling for SoC embedded IP cores based on reuse of network-on-chip

PDF

可视化

摘要/Abstract

引用本文

使用本文

参考文献

相关文章 7

编辑推荐

Metrics