计算机工程与应用 ›› 2009, Vol. 45 ›› Issue (33): 70-72.DOI: 10.3778/j.issn.1002-8331.2009.33.022

• 研发、设计、测试 • 上一篇    下一篇

一种快速准确控制复杂路径延时的方法

文鼎童,陈 岚   

  1. 中国科学院 微电子研究所 电子设计平台与共性技术研究室,北京 100029
  • 收稿日期:2008-09-19 修回日期:2008-12-12 出版日期:2009-11-21 发布日期:2009-11-21
  • 通讯作者: 文鼎童

Accurate complicated path delay control method

WEN Ding-tong,CHEN Lan   

  1. Common Technology Research Department,Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China
  • Received:2008-09-19 Revised:2008-12-12 Online:2009-11-21 Published:2009-11-21
  • Contact: WEN Ding-tong

摘要: 在深亚微米超大规模集成电路的物理设计中,为达到时序收敛经常遇到复杂路径延时的准确控制问题,提出了一种新的准确控制复杂路径延时方法,并使用布局布线工具Synopsys Astro实现。实验结果表明,该方法比传统的ECO(Engineer Change Order)精度高,收敛速度快,可广泛应用于超大规模集成电路物理设计。

关键词: 单元延时, ECO, 非线性延时模型, 时钟树综合

Abstract: In submicron VLSI physical design,how to control complicated path delay accurately in order to meet timing is always a great challenge.In this paper,a new complicated path control method is proposed,which works accurately and quickly by using placement & routing tool Synopsys Astro.The experimental results indicate that this method can achieve better accuracy and faster convergence than traditional ECO(Engineer Change Order) method,and can be widely used in VLSI physical design.

Key words: cell delay, Engineer Change Order(ECO), nonlinear delay model, Clock Tree Synthesis(CTS)

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