Design of infrared image acquire and pre-process circuit based on FPGA

Computer Engineering and Applications ›› 2007, Vol. 43 ›› Issue (21): 96-98.

• 产品、研发、测试 • Previous Articles Next Articles

Design of infrared image acquire and pre-process circuit based on FPGA

SUN Li-hui^1,2，WANG Yong-zhong¹，CHEN Ya-bing¹

1.Ordnance Engineering College，Shijiazhuang 050003，China
2.Hebei University of Economic & Trade，Shijiazhuang 050061，China

Received:1900-01-01 Revised:1900-01-01 Online:2007-07-21 Published:2007-07-21
Contact: SUN Li-hui

基于FPGA的红外图像高速采集及预处理电路

孙立辉^1,2，王永仲¹，陈娅冰¹

1.军械工程学院光学与电子工程系，石家庄 050003
2.河北经贸大学信息技术学院，石家庄 050061

通讯作者: 孙立辉

Abstract

Abstract: The structure of high speed infrared image acquired and pre-process system based on FPGA is presented.The circuit adopts many technologies such as module structure design，pipeline style，ping-pang store etc.The real-time performance of data transfer is ensured because the circuit communicates with TMS320C6414 by HPI.The implement technology of image-acquired module，HPI interface module etc.has been given.The experiment results show that the circuit realized 16 bits digital PAL mode image acquire and pre-process and it assumes a lot of computation burden and the real-time performance of whole system is improved greatly.

Key words: FPGA, image acquire, pre-process, infrared image

摘要：

介绍了基于FPGA的红外视频图像高速采集及预处理电路的总体结构。电路采用了模块化结构设计、流水线工作方式及乒乓存储等多项技术。该电路与TMS320C6414通过HPI口高速通信保证了数据传输的实时性。详细介绍了图像采集、HPI接口等模块的工作原理及实现方法。经实验，该电路实现了对数字PAL式16位数字图像的采集及背景抑制，分担了大量后续处理机的计算工作，极大地提高了系统的实时性。

关键词: FPGA, 图像采集, 预处理, 红外图像

SUN Li-hui^1,2，WANG Yong-zhong¹，CHEN Ya-bing¹. Design of infrared image acquire and pre-process circuit based on FPGA[J]. Computer Engineering and Applications, 2007, 43(21): 96-98.

孙立辉^1,2，王永仲¹，陈娅冰¹. 基于FPGA的红外图像高速采集及预处理电路[J]. 计算机工程与应用, 2007, 43(21): 96-98.

[1]	DU Yuzhang, PAN Jiahua, ZONG Rong, SU Wei, WANG Weilian. Lightweight Network Heart Sound Classifier Based on Hardware Acceleration [J]. Computer Engineering and Applications, 2021, 57(23): 263-269.
[2]	JIANG Peihe, WANG Chenxu, GUO Gang, WEI Yinsheng. Research on Hardware Trojan Detection for FPGA Application [J]. Computer Engineering and Applications, 2021, 57(20): 119-124.
[3]	LENG Ming, SUN Lingyu, GUO Chen. Forward Circuit Generation Algorithm of XDL Netlist [J]. Computer Engineering and Applications, 2021, 57(10): 75-80.
[4]	WU Yiyang, FAN Fan, ZHOU Yi, HUANG Jun. FPGA Implementation of Affine Transformation Based on Pre-interpolation [J]. Computer Engineering and Applications, 2020, 56(6): 224-230.
[5]	WANG Meile, ZHANG Zhizhong, XI Bing. Feasibility Analysis of Downlink Baseband Board for LTE-A Air Interface Analyzer [J]. Computer Engineering and Applications, 2020, 56(4): 268-273.
[6]	ZHANG Wei, LIU Yuhong, ZHANG Rongfen. Design of IP Cores for CNN Convolutional Layer and Pooling Layer Capable of Time Division Multiplexing [J]. Computer Engineering and Applications, 2020, 56(24): 66-71.
[7]	MIN Chaobo. Image Registration via Adaptive Polynomial Mixture Transformation [J]. Computer Engineering and Applications, 2020, 56(23): 194-201.
[8]	WU Jin, ZHANG Weihua, XI Meng, DAI Wei. Optimized Design and FPGA Implementation of High-Performance Face Recognition Accelerator [J]. Computer Engineering and Applications, 2020, 56(22): 48-54.
[9]	WANG Fan, ZHOU Guoqing, ZHANG Rongting, LIU Dequan. FPGA-Oriented Fast Connected Component Labeling Method [J]. Computer Engineering and Applications, 2020, 56(22): 230-235.
[10]	ZHANG Xinwei, LI Kang, YU Gongjian, LIU Jiahang, LI Peiqi, CHAI Zhilei. Research and Implementation of Accelerating Neuromorphic Computing Based on ZYNQ Cluster [J]. Computer Engineering and Applications, 2020, 56(21): 65-71.
[11]	LI Zenggang, WANG Zhengyan, SUN Jingcheng. Research and Design of Handwritten Digital BP Neural Network Based on FPGA [J]. Computer Engineering and Applications, 2020, 56(17): 251-257.
[12]	LI Rengang, REN Zhixin, WANG Jiangwei, KAN Hongwei, ZHANG Chuang, GONG Weifeng. Design and Implementation of Memory Data Protection Technology Based on FPGA [J]. Computer Engineering and Applications, 2020, 56(13): 72-76.
[13]	SUN Jingcheng, WANG Zhengyan, LI Zenggang. FPGA Implementation of Convolution Neural Network Digital Recognition System [J]. Computer Engineering and Applications, 2020, 56(13): 181-188.
[14]	LI Chiyang, LEI Qianqian, YANG Yanfei. FPGA Implementation of Full-Universal AES Encryption Algorithm [J]. Computer Engineering and Applications, 2020, 56(10): 83-87.
[15]	WANG Haiyu, XIE Lili, WANG Shan. Neural Network Sinusoidal Signal Generator [J]. Computer Engineering and Applications, 2019, 55(16): 259-264.

Design of infrared image acquire and pre-process circuit based on FPGA

基于FPGA的红外图像高速采集及预处理电路

PDF

Knowledge

Abstract

Cite this article

share this article

References

Related Articles 15

Recommended Articles

Metrics