Computer Engineering and Applications ›› 2010, Vol. 46 ›› Issue (12): 227-229.DOI: 10.3778/j.issn.1002-8331.2010.12.068

• 工程与应用 • Previous Articles     Next Articles

Research of 3D modeling and visualization for integrate circuit etching process

WU Yong-liang,WAN Wang-gen,CUI Bin   

  1. School of Communication and Information Engineering,Shanghai University,Shanghai 200072,China
  • Received:2008-10-14 Revised:2009-01-17 Online:2010-04-21 Published:2010-04-21
  • Contact: WU Yong-liang

集成电路刻蚀过程三维建模与可视化技术研究

吴永亮,万旺根,崔 滨   

  1. 上海大学 通信与信息工程学院,上海 200072
  • 通讯作者: 吴永亮

Abstract: The paper brings forward a new math model of integrated circuits etching process suited to 3D environment and digitalizes the model to enable it simulate with digital computers.At the same time,the surface evolvement process of the etching process is researched and the related math model is proposed.Also the visualization technology and the related implementation of the etching process simulation are analyzed.At last,the result of the simulation is proposed and discussed.

摘要: 提出了一个新的、适合于三维条件下集成电路刻蚀过程的数学模型,并对其进行离散化处理,使它能够使用数字计算机进行刻蚀过程的仿真;同时研究了刻蚀过程的表面演化过程并给出了相关的数学模型;又研究了刻蚀模型仿真可视化技术的相关算法以及实现;最后给出了仿真结果并对其进行了讨论。

CLC Number: